Top-down fabricated Ge based reconfigurable transistor

Conventional integrated circuit (IC) devices do not permit circuit reconfiguration because their logic functions are generally fixed by their physical layout and doped regions. Course-grain reconfiguration is the main approach currently used to overcome this limitation. Unfortunately, this approach is disadvantageous as it does not utilize some active chip regions, leading to high data transfer latency. Fine-reconfiguration has resulted in the required paradigm change allowing the redesign of circuits and devices after manufacturing as well as at runtime. Thus, combinational circuits realized through reconfiguring complete logic blocks exhibited benefits in terms of area and power consumption.

The concepts of conventional field-effect transistors (FETs) are generally limited to static electrical functions primarily because they require extraordinary reproducible and steep doping concertation. With most ICs reaching their physical scalability limits, doping-free reconfigurable FETs (RFETs) have emerged as promising device concepts. As the basic building blocks of such devices, RFETs can dynamically modify the operation of the device between n- or p-type even during runtime. RFETs have been achieved using different channel materials.

Among the available channel materials, Ge has emerged as a potential channel material for reducing the power consumption and solving the switching delay associated with RFETs owing to their reduced bandgap. However, this technology is limited to bottom-up demonstrators where patterning, positioning, nanowire size and crystal orientation control are challenging. Besides, the devices suffer from inherent process variability resulting in different barrier heights and electrical properties. Therefore, developing effective top-down Ge RFET technology to realize the deterministic capability and low variability required to manufacture demonstrator circuits is highly desirable.

Despite Ge being identified as a promising channel material to enable reduction of power consumption and switching delay compared to Si reconfigurable field-effect transistors (RFETs), Ge based devices have been limited to simulations and bottom-up demonstrators not compatible with complex circuit technology. A key material aspect that had been missing so far to advance this prominent technology were the unstable phases upon germanide crystal contact formation,¹ that yield in a large variability and unpredictability in the electrical characteristics of the built devices. Thereto, transferring monolithic Al-Ge-Al heterostructures to a deterministic top-down fabrication scheme based on a Ge on insulator (GeOI) platform,² enabled Ge RFETs with a stable contact crystal phase and abrupt interfaces ensuring a reliable and reproducible contact formation.³ Moreover, the GeOI approach allows the realization of more sophisticated solutions applicable in industrial environments for the implementation of RFET circuits to extend common CMOS capabilities.

Herein, a team of researchers from TU Wien: PhD candidate Raphael Böckle, Dr. Masiar Sistani, and Professor Walter M. Weber designed a deterministic top-down Ge RFET technology to realize a Ge-based RFET architecture. This technology was developed by employing a GeOI integration scheme. Unlike conventional methods that use Ni-germanide contacts, this technology used monolithically integrated Al-Ge-Al heterostructures. The work is currently published in the research journal, Advanced Materials Technology.

The research team findings showed that the new technology was capable of controlling the polarity and suppressing the leakage current due to the injection of specific charge carriers through the gated Al-Ge heterojunctions and the presence of an electrostatic energy barrier. The monolithically integrated Al-Ge-Al heterostructures overcome the challenge of reproducibly and deterministically defining the metallic phase of the drain junctions, thus solving the phase stability issues associated with the conventional methods. Additionally, the Al-Ge exchange produced pure and highly conducting leads. The concentration of the charge carrier in the Ge channel was effectively controlled by the dedicated gate-control, allowing the transistor to be switched on and off. Furthermore, compared with conventional FET architectures, the proposed architecture reduced the off-current significantly while suppressing the ambipolar operation even at elevated temperatures.

In summary, the researchers demonstrated the effectiveness of a three-independent gate RFET scheme based on monolithic Al-Ge-Al heterostructure lodged in a GeOI platform. By tuning the barrier transmissibility, both unipolar n- and p-type operations were successfully achieved. In addition, the use of monolithic Al/Ge contacts reduces the impact of process variability than Ni-germanide contacts. In a statement to Advances in Engineering, the authors explained the new platform provides the initial step towards future generation of adaptable and flexible circuit design based on RFET architecture and will enable alternative and diversified computing approaches.