Characterizing traps causing random telegraph noise during trap-assisted tunneling gate-induced drain leakage

Significance Statement

Variable retention time (VRT) phenomenon in DRAM cell is one of the main sources in retention time degradation and serious issue in DRAM cell transistor recently. Many researches have mentioned that the origin of VRT is gate-induced drain leakage random telegraph noise. Thus, the electrical analysis on trap-detrap sites (traps) causing gate-induced drain leakage random telegraph noise is very important topic for understanding the VRT phenomenon. Thus far, researches on gate-induced drain leakage current random telegraph noise in band-to-band tunneling current region have been mainly conducted. However, with device and supply voltage scaling, gate-induced drain leakage current through trap-assisted tunneling (TAT) mainly flows in the low voltage region. Nevertheless, there are great lack of the researches on trap-assisted tunneling gate-induced drain leakage current random telegraph noise. In this paper, two traps causing gate-induced drain leakage random telegraph noise in trap-assisted tunneling current region were analyzed. And, the accurate method for extracting the distance between the two traps was proposed using trap-assisted tunneling gate-induced drain leakage current ratio and effective permittivity. These analyses provide the insight for understanding the traps causing trap-assisted tunneling gate-induced drain leakage current random telegraph noise and can be applied to any devices where gate-induced drain leakage random telegraph noise in trap-assisted tunneling current region was measured.

 

 

About the author

Sung-Won Yoo was born in Seoul, Korea, in 1986. He received the B.S. in electrical engineering from Hanyang University, Seoul, Korea, in 2009. He received the M.S. degrees in electrical engineering from Seoul National University, Seoul, Korea, in 2011. He is working toward the Ph. D. degree in electrical engineering and computer science at Seoul National University, Seoul, Korea. His research interests include the device random noise and reliability analysis in DRAM cell and very-scaled Logic devices..

About the author

 Joonha Shin is a senior student at Seoul Science High School for Gifted Students. 

 

About the author

Youngsoo Seo received his B.S. degree in the School of Electrical Engineering from SungKyunKwan University, Suwon, Korea, in 2013. In 2013, he joined the Seoul National University, Seoul, Korea. He is working toward the Ph. D. degree in electrical engineering and computer science at Seoul National University, Seoul, Korea. His research interests are ultra-scaled transistor reliability and modeling.

 

About the author

Hyun Suk Kim received the B.S. degree in School of Electrical Engineering from Ajou University, Suwon, Korea in 2014. He is currently working as a Master candidate in Seoul National University (SNU), Seoul, Korea. His current research interests include FinFET simulation and modeling.

 

About the author

Sangbin Jeon received the B.S. degree in School of Electrical Engineering from Korea University, Seoul, Korea in 2014. He is currently working as a Master candidate in Seoul National University (SNU), Seoul, Korea. His current research interests include DRAM, FinFET simulation, and modeling.

 

About the author

Hyunsoo Kim received the B.S. degree in School of Electrical Engineering from Kookmin University, Seoul, Korea in 2011. He is currently working as a Master candidate in Seoul National University (SNU), Seoul, Korea. His current research interests include FinFET simulation and modeling.

 

About the author

Hyungcheol Shin(S’92–M’93–SM’00) received the B.S. (magna cum laude) and M.S. degrees in electronics engineering from Seoul National University, Seoul, Korea, in 1985 and 1987, respectively, and the Ph.D. degree in electrical engineering from the University of California, Berkeley, in 1993. From 1994 to 1996, he was a Senior Device Engineer with Motorola Advanced Custom Technologies. In 1996, he was with the Department of Electrical Engineering and Computer Sciences, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea. During his sabbatical leave from 2001 to 2002, he was a Staff Scientist with Berkana Wireless, Inc., San Jose, CA, where he was in charge of CMOS RF modeling. Since 2003, he has been with the School of Electrical Engineering and Computer Science, Seoul National University. He has published over 500 technical papers in international journals and conference proceedings.

His current research interests Flash Memory, DRAM cell transistor, Nano-CMOS, CMOS RF, and noise. Prof. Shin was a committee member of the International Electron Devices Meeting. He also has served as a committee member of several international conferences, including the International Workshop on Compact Modeling and SSDM, and as a committee member of the IEEE EDS Graduate Student Fellowship. He is a Lifetime Member of the Institute of Electronics Engineers of Korea (IEEK). He received the Excellent Teaching Award from the Department of Electrical Engineering and Computer Sciences, KAIST, in 1998, The Haedong Paper Award from IEEK in 1999, and the Excellent Teaching Award from Seoul National University in 2005, 2007, and 2009. He is listed in Who’s Who in the World. From 2012 to 2013, he has been director of Inter-university Semiconductor Research Center (ISRC).

 

Characterizing traps causing random telegraph noise during trap-assisted- advances in engineering

Journal Reference

Solid-State Electronics, Volume 109, 2015, Pages 42–46.

Sung-Won Yoo1, Joonha Shin2, Youngsoo Seo1, Hyunsuk Kim1, Sangbin Jeon1, Hyunsoo Kim1,Hyungcheol Shin1

[expand title=”Show Affiliations”]
  1. School of Electrical Engineering and Computer Science, Seoul National University, #059, San 56-1, Daehak-dong, Kwanak-gu, Seoul 151-742, Republic of Korea
  2. Seoul Science High School, Hyehwa-ro 63, Jongro-gu, Seoul 110-530, Republic of Korea
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Abstract

This paper presents an analysis of traps causing random telegraph noise (RTN) in trap-assisted tunneling (TAT) gate-induced drain leakage (GIDL) current. random telegraph noise was shown for the first time to occur as a result of electron trapping rather than hole trapping. In addition, the proper effective permittivity of two different materials is used to accurately determine the distance between two traps causing RTN in TAT GIDL in an oxide.

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