Multiple resistance states in MoS2-based non-volatile memory devices: what, why and how?


Two-dimensional (2D) materials have been identified as potential candidates for developing non-volatile resistance switching (NVRS) devices with exceptional properties. The technology has attracted tremendous attention. Generally, the resistance in NVRS devices can be tuned by using external electrical bias to switch, repeatedly, between high and resistance states, and the states can be sustained without a power supply.

The structure of NVRS devices comprises an active layer sandwiched between two electrodes. The layer is well known to exhibit resistance switching properties. With more research into the switching property of NVRS devices in recent years, similar behaviors have been observed in several 2D materials, such as functionalized graphene oxide. Additionally, molybdenum disulfide (MoS2) has drawn significant research attention owing to its direct bandgap in monolayers and potential use as NVRS layer. Moreover, research has shown that monolayer MoS2, as well as some other TMDS, exhibit intrinsic NVRS properties in vertical metal-insulator-metal (MIM) configuration, an indication that resistance switching can also be obtained in thin 2D monolayers. These devices, collectively referred to as atomristors, can be used in making RF switches and flexible memory devices due to their stable switching, fast switch speed and high ON/OFF current ratio properties.

The voltage-sweeping method commonly used to obtain current-voltage curves and switching parameters is limited to critical SET voltage. As an alternative, the current-sweeping method that has been used in metal-oxide resistive random access memory (RRAM)exhibits diverse switching behavior making it a viable solution. Nevertheless, it has not been applied in 2D-based NVRS devices. On this account, Xiaohan Wu (PhD graduate), Ruijing Ge, Professor Deji Akinwande and Professor Jack Lee from The University of Texas at Austin investigated the switching mechanism of 2D monolayers using both voltage-sweep and current-sweep measurements. The authors aimed at obtaining in-depth understanding of the intriguing SET characteristics and switching mechanism of atomristors. The original research article can be found in the research journal, Nanotechnology.

The research team demonstrated that in contrast to one sharp transition observed in voltage sweep-curves, the resistance obtained via current-sweep exhibited multiple transition steps in the SET process. Also, the multiple transition steps were observed in different devices and in various cycles of a single device. The difference was attributed to the significant impact of the multiple conductive links induced by the defects in the atomic layers. And the results were in good agreement with those previously obtained through the conductive-bridge-like model for two-dimensional atomristors. Furthermore, the authors observed voltage-sweep RESET and current-sweep SET behaviors showing similar characteristics as those of the transition steps.

In summary, the authors reported using the current sweep-measurement method to study the non-volatile resistance switching behavior in MoS2-based atomristors. Compared to the voltage-sweep measurements, the current sweeping curves accurately characterized the resistance switching behaviors. Besides providing a fundamental and detailed understanding of the 2D-based memory devices, it provided an easier way of obtaining and identifying the multiple resistance states. The study insights provided additional supports for single and multiple conductive link models based on the migration of metal ions. In a statement to Advances in Engineering, the authors explained the study developed a reliable method for characterizing NVRS phenomena in 2D atomristors and other resistivity switching devices and would lead to higher performance neuromorphic computing and multi-bit non-volatile memory applications.

Multiple resistance states in MoS2-based non-volatile memory devices: what, why and how? - Advances in Engineering

About the author

Jack C. Lee is a Professor of the Electrical and Computer Engineering Department and holds the Cullen Trust for Higher Education Endowed Professorship in Engineering # 4 at The University of Texas at Austin. He received the B.S. and M.S. degrees in electrical engineering from University of California, Los Angeles, in 1980 and 1981, respectively; and the Ph.D. degree in electrical engineering from University of California, Berkeley, in 1988. From 1979 to 1984, he was a Member of Technical Staff at the TRW Microelectronics Center, CA, in the High-Speed Bipolar Device Program. He worked on bipolar device and circuit design, fabrication and testing. In 1988, he joined the faculty of The University of Texas at Austin.

In addition to research and teaching at The University of Texas at Austin, Dr. Lee been consulting and teaching short courses to technical engineers and managers in semiconductor industry on fabrication, operation and reliability of semiconductor devices (e.g. thin-film transistors (TFT) used in LCD displays) and display technologies such as LCD. His research and teaching interests include semiconductor devices, fabrication processes, characterization and modeling, dielectric process, characterization and reliability, display technologies, high-K gate dielectrics and electrode, semiconductor memory applications, and alternative channel materials.

Dr. Lee has over 30 years of experience in semiconductor technology and dielectric processing. He has published about 600 journal publications and conference proceedings, 6 book and book chapters on semiconductor devices and have 9 issued patents. He has also been recognized with many teaching and research awards. Dr. Lee is a Fellow of IEEE and a Distinguished Lecturer for the IEEE Electron Devices Society.


Wu, X., Ge, R., Akinwande, D., & Lee, J. (2020). Understanding of multiple resistance states by current sweeping in MoS2-based non-volatile memory devicesNanotechnology, 31(46), 465206.

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