Time interval generator with 8 ps resolution and wide range for large TDC array characterization

Significance Statement

In the last decade CMOS image sensors (CIS) were constantly improving. These days they are comparable to CCD sensors in terms of image quality. Moreover CMOS processes enable the possibility of integrating intelligence at sensor level. Complex image processing algorithms can run on-chip in order to produce very high frame rate. The next step in the development of smart image sensors is to incorporate the ability to capture the depth of the scene. Single photon avalanche diodes (SPADs) arranged in bi-dimensional arrays are employed to associate the estimated time-of-flight with each corresponding point in the scene. When it comes to high frame rate the digitization of the time-of-flight needs to be performed at pixel level. If one have to characterize arrays of time-to-digital converters based on the statistical code density test, several TB of frames have to be captured and transferred to the computer to be analyzed. Capturing hundreds of millions of frames can take several weeks. The proposed technique based on a linear picosecond time interval generator to characterize large arrays of time-to-digital converters proved to be extremely efficient. Thus the memory footprint and acquisition time tremendously decreased down to few GB and a couple of tens of minutes respectively.  

About the author

Ion Vornicu graduated in Electronics Engineering (specialization in Micro-technologies) in 2008 and got a M.Sc. degree in modern signal processing techniques and Ph.D. degree in Microelectronics in 2011 from the Faculty of Electronics and Telecommunications, Gh. Asachi Technical University of Iasi, Romania. During the Ph.D. his main research focus has been on CMOS implementation of a type of cellular neural networks for spatio-temporal analog image processing, log-domain circuits, smart CMOS imagers. Since December 2011, he is an Associate Researcher at the Institute of Microelectronics of Seville, Spain. His current research interests lie in the design and test of CMOS sensors based on single-photon avalanche diodes (SPADs) used for 3D vision and nuclear medicine imaging such as positron emission tomography (PET).

 

About the author

Ricardo Carmona-Galán graduated in Physics in 1993 and got a Ph.D. in Microelectronics in 2002 from the University of Seville, Spain. From July 1996 to June 1998, he worked as a Research Assistant at Prof. Chua’s laboratory in the EECS Department of the University of California, Berkeley. From 1999 to 2005 he was an Assistant Professor of the Department of Electronics of the University of Seville. Since 2005, he is a Tenured Scientist at the Institute of Microelectronics of Seville (IMSE-CNM-CSIC). His main research focus is the concurrent implementation of photosensor and mixed-signal processor arrays for real time image processing and vision. He also held a Postdoc at the University of Notre Dame, Indiana (2006 – 2007), where he worked in interfaces for CMOS compatible nanostructures for multispectral light sensing. He has collaborated with start-up companies in Seville (Anafocus) and Berkeley (Eutecus). He has designed several vision chips implementing different focal plane operators for early vision processing. His current research interests lie in the design of low-power smart image sensors for 2D and 3D vision and 3-D integrated circuits for autonomous vision systems. He has authored more than 110 papers in refereed journals and conferences and several book chapters.  Dr. Carmona-Galán received a Best Paper Award from the International Journal of Circuit Theory and Applications. He is a co-recipient of an award of the ACET and a Certificate of Teaching Excellence from the University of Seville.

About the author

Ángel Rodríguez-Vázquez (PhD, IEEE Fellow) is a Full Professor of Electronics at the University of Seville.

His research is on the design of analog and mixed-signal front-ends for sensing and communication, including smart imagers, vision chips and low-power sensory-processing microsystems. He has authored 11 books, 36 additional book chapters, and some 150 journal articles in peer-review specialized publications. He has presented invited plenary lectures at different international conferences and has received a number of awards for his research (the IEEE Guillemin-Cauer best paper award, two Wiley´s IJCTA best paper awards, two IEEE ECCTD best paper award, one SPIE-IST Electronic Imaging best paper award, the IEEE ISCAS best demo-paper award and the IEEE ICECS best demo-paper award). He was elected Fellow of the IEEE for his contributions to the design of chaos-based communication chips and neuro-fuzzy chips.

He co-founded AnaFocus Ltd. in 2001 on the basis of his patents on vision chips and served as CEO, on leave from the University, until June 2009, when the company reached maturity as a worldwide provider of smart CMOS imagers and vision systems-on-chip.

He has served as Editor, Associate Editor and Guest Editor for different IEEE and non-IEEE journals, is in the committee of several international journals and conferences, and has chaired several international IEEE and SPIE conferences. He served as VP Region 8 of the IEEE Circuits and Systems Society (2009-2012) and as Chair of the IEEE CASS Fellow Evaluation Committee (2010, 2012, 2013, 2014 and 2015).  

Journal Reference

Analog Integrated Circuits and Signal Processing,  pp 1-9, 11 October 2015.

Ion Vornicu , Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez.

Institute of Microelectronics of Seville (IMSE-CNM), CSIC-University of Seville, Seville, Spain.

Abstract:

Accurate generation of picosecond-resolution wide-range time intervals gives rise to a new time-efficient method for the characterization of large arrays of time-to-digital converters involved in time-resolved imaging. This paper presents the design and measurement of a time interval generator based on FPGA technology. Although it can be employed in different automatic test setups, it has been designed to characterize an array of time-to-digital converters. It can work as periodic pulse/frequency generator but also as a digital-to-time converter. The accuracy of the periodic pulse generator is around 20ps RMS jitter for a pulse-width ranging from 600ps to 33μs. The incremental time resolution is 8ps and the repetition rate is up to 2MHz. The digital-to-time converter error is less than 0.8LSB DNL and 2LSB INL, whilst the time resolution is 27ps. Full characterization of the module is reported including a comparison with state-of-the-art instruments in this field. The measurement results of the time-to-digital converter array driven by the designed digital-to-time converter module are presented as well. The effectiveness of the proposed method is evaluated by comparing it with the statistical code density test.

Go To Analog Integrated Circuits and Signal Processing

Time interval generator with 8 ps resolution and wide range for large TDC array characterization

 

 

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