Study of low temperature MOCVD deposition of TiN barrier layer for copper diffusion in high aspect ratio through silicon vias

Microelectronic Engineering, Volume 120, 2014, Pages 127–132.

Larissa Djomeni^{a, d,} , Thierry Mourier^a, Stéphane Minoret^a, Sabrina Fadloun^c, Fabien Piallat^a, Steve Burgess^b, Andrew Price^b, Yun Zhou^b, Christopher Jones^b,

Daniel Mathiot^d, Sylvain Maitrejean^a

^a CEA, LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble Cedex 9 38054, France.

^b SPTS, Ringland Way, Newport, Gwent NP18 2TA, UK.

^c SPTS SAS, Inovallée – Bat B 445, rue Lavoisier, Montbonnot 38330, France.

^d ICube Laboratory (Université de Strasbourg and CNRS), 23 rue du Loess, B.P. 20, Strasbourg Cedex 2 67037, France.

 

Abstract

This article is related to the development of a new low temperature CVD titanium nitride deposition process for the formation of a copper diffusion barrier in 3D TSV integration, using a metalorganic precursor and NH₃.

The physicochemical properties of the film are studied on 300 mm silicon wafers deposited using a SPTS Technologies Sigma300 fxP™ deposition equipment. A design of experiments (DoEs) was carried out at 200 °C to check the influence of parameters such as reactor pressure, spacing (distance between the showerhead and the wafer), precursor/NH₃ flow rate during deposition and NH₃ flow rate during a subsequent densification plasma treatment. Responses including resistivity, uniformity, deposition rate and stress were measured. From this DoE, two process points are chosen according to expected material specifications requested from applications: a low resistivity process and a median conditions process. Then microstructure, the composition and stoichiometry of the film deposited with these process points are studied. Finally, the step coverage and continuity of the barrier in a high aspect ratio “through silicon via” (8:1, 10 μm diameter etched in 80 μm silicon) are measured and compared with a reference I-PVD process.

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