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Emanuele Verrelli, Dimitris Tsoukalas
Microelectronic Engineering, Volume 90, February 2012
Abstract
In the present work we present experimental results and the first simulation results concerning the charge-trapping properties of devices based on HfO2, MNOS-like, for non-volatile-memory applications. Hafnium oxide sputtered on top of a silicon dioxide tunneling layer represents the storage layer for the charges injected/extracted from the p-type silicon substrate. Although no blocking oxide on top of the structure has been considered in this study, electrical characterization shows large hysteresis at voltages lower than 12 V. Insight to the physics underlying the behavior of such a device is given using a simulator presented in this work. The simulation of the programming characteristics will be presented and compared with those obtained from the fabricated devices giving insight to the properties of the traps involved. Good agreement is found between measured and simulated data.
Additional Information:
Charge trapping memories have made their point during last years as a possible solution to overcome the scaling issue of the floating-gate type memories. The use of high-k materials, less explored than silicon nitride as charge storage elements in SONOS-like memories, presents at least two important advantages: 1) the large variety of materials allows for engineering the potential well of the storage layer and 2) the high-k of the material allows for the reduction of the operating voltages. The write/erase operation in these devices is based onto the tunnelling of carriers from the Si substrate to the charge trapping layer through the tunnelling oxide. On the other hand the charge retention characteristic depend on how well the design parameters prevent a charge in a quasi bound state of a trap-site to tunnel back into the Si substrate. The former and the latter characteristic are of competing nature, that is, fast write operation may induce poor retention characteristics. The above argument makes mandatory the implementation of a simulation tool to give insight into the physics governing the device but also to support the optimal design of the memory itself. In this work the charge trapping properties of a good high-k candidate, Hafnium oxide, deposited by physical vapor deposition (PVD) from a pure hafnium oxide target will be presented and the trapping dynamics modeled in order to get insight into the physics underlying the phenomenon. In order to simulate the dynamic operation of this semiconductor non-volatile memory device the needed building blocks can be summarized as:1. A routine to calculate relevant semiconductor physical quantities as function of temperature and doping; 2. A routine to solve the Poisson equation in MOS devices (Poisson solver); 3. A routine that allows calculating the tunneling current through arbitrary energy barriers (multipurpose simulator); 4. A routine that based on the results provided by the above three routines, updates the carrier densities in the charge storage layer according to the continuity equations.
While in the last decade have been published many works concerning the modeling of the silicon nitride based SONOS memory devices, up to our knowledge, this is the first work in which is presented the simulation of the charge trapping in hafnium oxide trap layers for memory applications.
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