CMOS compatible self-aligned S/D regions for implant-free InGaAs MOSFETs

L. Czornomaz, M. El Kazzi, M. Hopstaken, D. Caimi, P. Mächler, C. Rossel, M. Bjoerk, C. Marchiori, H. Siegwart, J. Fompeyrine
Solid-State Electronics, Volume 74, August 2012

Abstract

CMOS compatible self-aligned access regions for indium gallium arsenide (In0.53Ga0.47As) implant-free n-type metal–oxide–semiconductor field effect transistors (MOSFETs) are investigated. In situ doped n+ source/drain regions are selectively grown by metal-organic vapor phase epitaxy and self-aligned Nickel–InGaAs alloyed metal contacts are obtained using a self-aligned silicide-like process, where different process conditions are studied. Soft pre-epitaxy cleaning is followed by X-ray photoelectron spectroscopy, while the Ni–InGaAs/III–V interface is characterized by back-side SIMS profiling. Relevant contact and sheet resistances are measured and integration issues are highlighted. Gate-first implant-free self-aligned n-MOSFETs are produced to quantify the impact of Ni–InGaAs contacts on the device performance.

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