Measured hyperbolic-sine (sinh) CMOS results: A high-order 10 Hz–1 kHz notch filter for 50/60 Hz noise

Microelectronics Journal, Volume 44, Issue 12,  2013, Pages 1268-1277.

Evdokia M. Kardoulaki, Konstantinos N. Glaros, Patrick Degenaar, Andreas G. Katsiamis, Henry Man D. Ip, Emmanuel M. Drakakis.

 

Department of Bioengineering, Imperial College London, SW7 2AZ London, UK and

School of EEE, Merz Court, Newcastle University, NE1 7RU Newcastle Upon Tyne, UK.

 

Abstract

This paper presents proof-of-concept measured results from CMOS hyperbolic-sine (sinh) filters fabricated in a commercially available 0.35 µm CMOS technology. Results from two chips are reported: a practical sinhintegrator and a high order (8th) notch filter dedicated to 50/60 Hz noise rejection and synthesized by means of the proposed integrator. Linearity, frequency and noise measurements are reported. The notch frequency of the 8th order filter can be tuned over almost two decades. Its attenuation exceeds 70 dB for the target frequency range of 20–60 Hz and its dynamic range (for THD<4%) amounts to 89 dB while consuming 8 µW from a 2 V power supply level. For an increased power consumption of 74 µW its dynamic range (for THD<4%) exceeds 100 dB.

 

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Additional Information: 

A solution to the trade-off of low distortion, high dynamic range (DR, defined as the ratio of the maximum signal swing for at an acceptable distortion over the noise floor) processing in systems that are required to operate from a low power supply and within a limited power budget, relies on a class of circuits termed Externally Linear Internally non-Linear (ELIN). ELIN topologies advantageously exploit the inherent non-linear exponential I-V characteristics of translinear devices (i.e. diodes, bipolar devices and weakly inverted MOS devices) to achieve a large DR without requiring the linearization of the individual active devices they employ. Therefore, despite including non-linear elements, they exhibit overall input-output linearity.

This is achieved by non-linearly compressing the input voltages prior to filtering and consequently expanding the filtered output voltages by means of an appropriate non-linear transconductor (which can be as simple as a common emitter bipolar device) in order to recover the full dynamic range of the processed signals. It is therefore ensured, that the signals remain above the noise floor and below the overload levels. This concept is known as companding i.e. compressing and expanding and can be used to relax the internal noise requirements thus making the use of smaller capacitors, and hence savings in chip area and power consumption possible.

Hyperbolic-Sine (Sinh) filters constitute a subclass of ELIN filters whereby the hyperbolic-sine (sinh) function is at the heart of their companding operation. Due to the odd symmetry of the sinh function, Sinh topologies are inherently class-AB (implying that the biasing currents can be set much lower than the expected maximum signal swings) and this gives them a further advantage without the need to resort to pseudo-differential architectures which require twice as much capacitor area and elaborate layout practice to ensure matching.

Hence with one capacitor per pole, it is possible to design a topology with µW power consumption, operating from a low power supply (< 2V) and exhibiting +100 dB DR. Measured results from the first fabricated hyperbolic-sine filter chips are presented in this paper. The target application is portable medical devices however there is scope for applications such as audio signal processing, cochlea implants, electronically steerable ultrasound probes and complex filters.

Measured hyperbolic-sine (sinh) CMOS results

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